10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 268 of 1658
REJ09B0261-0100
Source
Number of
Sources
(Max.) Priority INTEVT Remarks
H'320 IRL[3:0] pin = HLLH (H'9)
H'C20 IRL[7:4] pin = HLLH (H'9)
H'340 IRL[3:0] pin = HLHL (H'A)
External
interrupts
IRL 2
H'C40 IRL[7:4] pin = HLHL (H'A)
High
H'360 IRL[3:0] pin = HLHH (H'B)
H'C60 IRL[7:4] pin = HLHH (H'B)
H'380 IRL[3:0] pin = HHLL (H'C)
H'C80 IRL[7:4] pin = HHLL (H'C)
H'3A0 IRL[3:0] pin = HHLH (H'D)
H'CA0 IRL[7:4] pin = HHLH (H'D)
H'3C0 IRL[3:0] pin = HHHL (H'E)
Inverse of values on
the input pins
(because the signals
are active low)
Input level
H: high level
L: low level
(see table 10.11)
H'CC0 IRL[7:4] pin = HHHL (H'E) Low
8 Values set in INTPRI H'240 IRQ[0] High
IRQ
interrupt H'280 IRQ[1]
H'2C0 IRQ[2]
H'300 IRQ[3]
H'340 IRQ[4]
H'380 IRQ[5]
H'3C0 IRQ[6]
H'200 IRQ[7] Low
WDT 1 H'560 ITI*
TMU-ch0 1
Values set in
INT2PRI0 to INT2PRI9 H'580 TUNI0*
TMU-ch1 1 H'5A0 TUNI1*
TMU-ch2 2 H'5C0 TUNI2*
On-chip
peripheral
module
interrupts*
H'5E0 TICPI2*
H-UDI 1 H'600 H-UDII
DMAC(0) 7 H'620 DMINT0*
H'640 DMINT1*
H'660 DMINT2*