19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 849 of 1658
REJ09B0261-0100
19.3.3 Display Status Register (DSSR) The display status register (DSSR) is a register used to read, from outside, the internal state of the display unit (DU).
R/W:
Internal update:
R/W:
Internal update:
161718192021222324252627282931 30Bit:
Initial value:
RRRRRRRRRRRRRRRR
0000000000001100
DFB1DFB2DFB3DFB4DFB5DFB6
— —
RRRRRRRRRRRRRRRR
0000000000000000
HBKRINT
VBK
TVR FRM
01234567891011121315 14Bit:
Initial value:
Bit Bit Name
Initial
Value R/W
Internal
Update Description
31, 30 00 R Reserved
These bits are always read as 0. The write value
should always be 0.
29, 28 11 R Reserved
These bits are always read as 1. The write value
should always be 1.
27 to 22 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
21 DFB6 0 R None Display Frame Buffer 6 Flag
0: The address indicated by the plane 6 display
area start address 0 register (P6DSA0R) in
plane 6 is being used as the display area start
address
1: The address indicated by the plane 6 display
area start address 1 register (P6DSA1R) in
plane 6 is being used as the display area start
address