32. Electrical Characteristics
Rev.1.00 Jan. 10, 2008 Page 1597 of 1658
REJ09B0261-0100
32.3.5 INTC Module Signal Timing Table 32.10 INTC Module Signal Timing Conditions: VDDQ= 3.0 to 3.6 V, VDD= 1.1 V, Ta= 40 to 85°C, CL= 30 pF, PLL2 on
Item Symbol Min. Typ. Max. Unit Figure
NMI setup time tNMIS 4 — ns 32.34
NMI hold time tNMIH 1.5 ns 32.34
NMI pulse width (high level) tNMIIS 5 — — tcyc* 32.35
NMI pulse width (low level) tNMIIH 5 — tcyc* 32.35
Edge-sense IRQ pulse width (high
level)
tIRQIH 5 — — tcyc* 32.35
Edge-sense IRQ pulse width (low
level)
tIRQIL 5 — — tcyc* 32.35
IRL7 to IRL0 setup time tIRLS 4 — ns 32.34
IRL7 to IRL0 hold time tIRLH 1.5 ns 32.34
IRQOUT delay time tIRQOD 1.5 6 ns 32.36
Note: * t
cyc is the period of one CLKOUT cycle.
CLKOUT
NMI
IRL3 to IRL0
IRL7 to IRL4
t
NMIS
t
NMIH
t
IRLS
t
IRLH
Figure 32.34 Interrupt Signal Input Timing (1)