19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 832 of 1658
REJ09B0261-0100
Register Name Abbr.
Power-On
Reset by
PRESET
Pin/ WDT/
H-UDI
Manual
Reset by
WDT
Sleep by
Sleep
Instruction
Module
Standby
Deep
Sleep
Bits with
Internal Update
Function
Display attribute registers
Color palette 1
transparent color
register
CP1TR H'00000000 Retained Retained Retained Retained All bits
Color palette 2
transparent color
register
CP2TR H'00000000 Retained Retained Retained Retained All bits
Color palette 3
transparent color
register
CP3TR H'00000000 Retained Retained Retained Retained All bits
Color palette 4
transparent color
register
CP4TR H'00000000 Retained Retained Retained Retained All bits
Display-off output
register
DOOR Undefined Retained Retained Retained Retained All bits
Color detection
register
CDER Undefined Retained Retained Retained Retained All bits
Base color register BPOR Undefined Retained Retained Retained Retained All bits
Raster interrupt
offset register
RINTOFSR Undefined Retained Retained Retained Retained All bits
Display plane registers
Plane 1 mode
register
P1MR H'00000000 Retained Retained Retained Retained All bits
Plane 1 memory
width register
P1MWR Undefined Retained Retained Retained Retained All bits
Plane 1 blend ratio
register
P1ALPHAR Undefined Retained Retained Retained Retained All bits
Plane 1 display
size X register
P1DSXR Undefined Retained Retained Retained Retained All bits
Plane 1 display
size Y register
P1DSYR Undefined Retained Retained Retained Retained All bits
Plane 1 display
position X register
P1DPXR Undefined Retained Retained Retained Retained All bits