12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 462 of 1658
REJ09B0261-0100

Table 12.2 An Example of DDR2-SDRAM Connection (When Four 2-Gb DDR2-SDRAM Units (256 M × 8 Bits) Are Used)
Memory
MCK1,
MCK1
MCK0,
MCK0
MODT,
MCKE,
MCS,
MRAS,
MCAS,
MWE, MA14
to MA0,
MBA2 to
MBA0
MDQ31 to
MDQ24,
MDQS3,
MDQS3,
MDM3
MDQ23 to
MDQ16,
MDQS2,
MDQS2,
MDM2
MDQ15 to
MDQ8,
MDQS1,
MDQS1,
MDM1
MDQ7 to
MDQ0,
MDQS0,
MDQS0,
MDM0
Memory #1 Connected*1 Connected*2Connected*3
Memory #2 Connected*1 Connected*2 Connected*4
Memory #3 Connected*1 Connected*2 Connected*5
Memory #4 Connected*1 Connected*2 Connected*6

Notes: 1. SDRAM pins s hould be connected as shown below.

Memory #1 and #2
Pins SH7785 Pins
Memory #3 and #4
Pins SH7785 Pins
CK MCK1 CK MCK0
CK MCK1 CK MCK0

2. SDRAM pins should be connected as shown below.

Memory #1 to #4
Pins SH7785 Pins
Memory #1 to #4
Pins SH7785 Pins
ODT MODT A8 MA8
CKE MCKE A7 MA7
CS MCS A6 MA6
RAS MRAS A5 MA5
CAS MCAS A4 MA4
WE MWE A3 MA3
A14 MA14 A2 MA2
A13 MA13 A1 MA1
A12 MA12 A0 MA0
A11 MA11 BA2 MBA2
A10 MA10 BA1 MBA1
A9 MA9 BA0 MBA0