18. Timer Unit (TMU)
Rev.1.00 Jan. 10, 2008 Page 809 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W Description
2
1
0
TPSC2
TPSC1
TPSC0
0
0
0
R/W
R/W
R/W
Timer Prescaler 2 to 0
These bits select the TCNT count clock.
000: Counts on Pck/4
001: Counts on Pck/16
010: Counts on Pck/64
011: Counts on Pck/256
100: Counts on Pck/1024
101, 110: Setting prohibited
111: Counts on external clock (TCLK) *3
Legend:
X: Don't care
Notes: 1. Reserve d bit in channels 0 to 5 (initial value is 0, and can only be read).
2. Writing 1 does not change the value; the previous value is retained.
3. Do not set in channels 3, 4, and 5.
18.3.5 Input Capture Register 2 (TCPR2) TCPR2 is a 32-bit read-only register for use with the input capture function, provided only in channel 2. The input capture function is controlled by means of the ICPE and CKEG bits in TCR2. When input capture occurs, the TCNT2 value is copied into TCPR2. The value is set in TCPR2 only when the ICPF bit in TCR2 is 0.
161718192021222324252627282931 30BIt:
Initial value:
R/W:
01234567891011121315 14BIt:
Initial value:
R/W:
——
RRRRRRRRRRRRRRRR
——
RRRRRRRRRRRRRRRR