11. Local Bus State Controller (LBSC)

Rev.1.00 Jan. 10, 2008 Page 422 of 1658

REJ09B0261-0100

CLKOUT
Tpcm0
A25 to A0
R/W
CExx
REG
RD
(In reading)
D15 to D0
(In reading)
D15 to D0
(In writing)
WE1
(In writing)
BS
RDY
Tpcm0w Tpcm1 Tpcm1w Tpcm1w Tpcm2 Tpcm2w
DACKn
In this example, DACKn is active-high.
Figure 11.18 Wait Timing for PCMCIA Memory Card Interface