19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 877 of 1658
REJ09B0261-0100
19.3.22 DE Signal Width Register (DEWR) The DE signal width register (DEWR) sets the high-level width of the DE signal. The value is retained during power-on reset and manual reset.
R/W:
Internal update:
R/W:
Internal update:
161718192021222324252627282931 30Bit:
Initial value:
RRRRRRRRRRRRRRRR
0000000000000000
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WRRRRR
OOOOOOOOOOO
00000
DEW
— —
01234567891011121315 14Bit:
Initial value:
Bit Bit Name
Initial
Value R/W
Internal
Update Description
31 to 11 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
10 to 0 DEW Undefined R/W Yes DE Signal Width
The high-level width of the DE signal should be
set in dot clock units.
If the HSYNC signal falls while the DE signal is
at high level, the DE signal also falls.