11. Local Bus State Controller (LBSC)

Rev.1.00 Jan. 10, 2008 Page 426 of 1658

REJ09B0261-0100

TpciTpci0 Tpci1w Tpci2 Tpci2w Tpci0 Tpci Tpci2
Tpci1w Tpci2w
CLKOUT
A25 to A1
A0
R/W
IORD (WE2)
(In reading)
IOWR (WE3)
(In writing)
D15 to D0
(In writing)
D15 to D0
(In reading)
BS
IOIS16
DACKn
CExx
REG
RDY
In this example, DACKn is active-high.
Figure 11.21 Dynamic Bus Sizing Timing for PCMCIA I/O Card Interface