15. Clock Pulse Generator (CPG)
Rev.1.00 Jan. 10, 2008 Page 748 of 1658
REJ09B0261-0100
15.5 Calculating the Frequency

Table 15.7 shows the relationship between the division ratio of divider 2 described for frequency

control register FRQCR1 and frequency display register FRQMR1, and the EXTAL input.

Table 15.7 Relationship Between the Division Ratio of Divider 2 and the Frequency

Frequency (for an input clock)
Division ratio of
divider 2 Clock operating mode 0 to 3 Clock operating mode 16 to 19
× 1/2 × 36 × 18
× 1/4 × 18 × 9
× 1/6 × 12 × 6
× 1/8 × 9 × 9/2
× 1/12 × 6 × 3
× 1/16 × 9/2 × 9/4
× 1/18 × 4 × 2
× 1/24 × 3 × 3/2
× 1/32 × 9/4 × 9/8
× 1/36 × 2 × 1
× 1/48 × 3/2 × 3/4