29. User Break Controller (UBC)
Rev.1.00 Jan. 10, 2008 Page 1465 of 1658
REJ09B0261-0100
29.2.3 Match Address Setting Registers 0 and 1 (CAR0 and CAR1) CAR0 and CAR1 are readable/writable 32-bit registers specifying the virtual address to be included in the break conditions for channels 0 and 1, respectively. • CAR0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CA
CA
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit :
Initial value :
R/W:
Bit :
Initial value :
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 0 CA Undefined R/W Compare Address
Specifies the address to be included in the break
conditions.
When the operand bus has been specified using the
CBR0 register, specify the SAB address in CA[31:0].
• CAR1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CA
CA
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit :
Initial value :
R/W:
Bit :
Initial value :
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 0 CA Undefined R/W Compare Address
Specifies the address to be included in the break
conditions.
When the operand bus has been specified using the
CBR1 register, specify the SAB address in CA[31:0].