13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 574 of 1658
REJ09B0261-0100
(13) PCI I/O Base Address Register (PCIIBAR) This register is the I/O space base address register of the PCI configuration register space header that is defined in PCI local bus specification. This register specifies the base address in the I/O space of the PCIC. See section 13.4.4 (2), Accessing PCIC I/O Space.
01234567891011121315 14
ASI
IOB2 (lower)IOB1 (upper)
1000000000000000
RRRRRRRRR/WR/WR/WR/WR/WR/WR/W R/W
Bit:
Initial value:
SH R/W:
RRRRRRRRR/WR/WR/WR/WR/WR/WR/W R/W
PCI R/W:
161718192021222324252627282931 30
IOB1 (upper)
0000000000000000
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W R/W
Bit:
Initial value:
SH R/W:
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W R/WPCI R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 8 IOB1
(upper)
H'000000 SH: R/W
PCI: R/W
I/O Space Base Address (upper 24 bits)
These bits specify the upper 24 bits of the base
address for the I/O space of the PCIC (PCIC control
register space).
7 to 2 IOB2
(lower)
000000 SH: R
PCI: R
I/O Space Base Address (lower 6 bits)
These bits are fixed to B'000000 by hardware.
1 0 SH: R
PCI: R
Reserved
This bit is always read as 0. The write value should
always be 0.
0 ASI 1 SH: R
PCI: R
Address Space Indicator
Indicates whether the base address indicated by this
register is in the I/O space or memory space.
0: Memory space
1: I/O space