3. Instruction Set
Rev.1.00 Jan. 10, 2008 Page 63 of 1658
REJ09B0261-0100
Instruction Operation Instruction Code Privileged T Bit New
FADD FRm,FRn FRn + FRm FRn 1111nnnnmmmm0000 — —
FCMP/EQ FRm,FRn When FRn = FRm, 1 T
Otherwise, 0 T
1111nnnnmmmm0100 Comparis
on result
FCMP/GT FRm,FRn When FRn > FRm, 1 T
Otherwise, 0 T
1111nnnnmmmm0101 Comparis
on result
FDIV FRm,FRn FRn/FRm FRn 1111nnnnmmmm0011 — —
FLOAT FPUL,FRn (float) FPUL FRn 1111nnnn00101101 — —
FMAC FR0,FRm,FRn FR0*FRm + FRn FRn 1111nnnnmmmm1110 — —
FMUL FRm,FRn FRn*FRm FRn 1111nnnnmmmm0010 — —
FNEG FRn FRn H'8000 0000 FRn 1111nnnn01001101 — —
FSQRT FRn FRn FRn 1111nnnn01101101 — —
FSUB FRm,FRn FRn FRm FRn 1111nnnnmmmm0001 — —
FTRC FRm,FPUL (long) FRm FPUL 1111mmmm00111101 — —
Table 3.11 Floating-Point Double-Precision Instructions
Instruction Operation Instruction Code Privileged T Bit New
FABS DRn DRn & H'7FFF FFFF FFFF
FFFF DRn
1111nnn001011101 — —
FADD DRm,DRn DRn + DRm DRn 1111nnn0mmm00000 — —
FCMP/EQ DRm,DRn When DRn = DRm, 1 T
Otherwise, 0 T
1111nnn0mmm00100 — Comparison
result
FCMP/GT DRm,DRn When DRn > DRm, 1 T
Otherwise, 0 T
1111nnn0mmm00101 — Comparison
result
FDIV DRm,DRn DRn /DRm DRn 1111nnn0mmm00011 — —
FCNVDS DRm,FPUL double_to_ float(DRm)
FPUL
1111mmm010111101 — —
FCNVSD FPUL,DRn float_to_ double (FPUL)
DRn
1111nnn010101101 — —
FLOAT FPUL,DRn (fl oat)FPUL DRn 1111nnn000101101 — —
FMUL DRm,DRn DRn *DRm DRn 1111nnn0mmm00010 — —
FNEG DRn DRn ^ H'8000 0000 0000
0000 DRn
1111nnn001001101 — —
FSQRT DRn DRn DRn 1111nnn001101101 — —
FSUB DRm,DRn DRn – DRm DRn 1111nnn0mmm00001 — —
FTRC DRm,FPUL (long) DRm FPUL 1111mmm000111101 — —