23. Serial Peripheral Interface (HSPI)
Rev.1.00 Jan. 10, 2008 Page 1154 of 1658
REJ09B0261-0100
Table 23.3 Register Configuration (2)
Register Name Abbrev.
Power-on Reset
by PRESET
Pin/WDT/H-UDI
Manual Reset
by WDT/
Multiple
Exception
Sleep/Deep
Sleep by
SLEEP
Instruction
Module
Standby
Software
Reset
Control register SPCR H'0000 0000 H'0000 0000 Retained Retained Retained
Status register SPSR H'xxxx xx20*1 H'xxxx xx20*1 Retained Retained H'xxxx xxxx*2
System control register SPSCR H'0000 0040 H'0000 0040 Retained Retained Retained
Transmit buffer register SPTBR H'0000 0000 H'0000 0000 Retained Retained Retained
Receive buffer register SPRBR H'0000 0000 H'0000 0000 Retained Retained Retained
Notes: 1. "x" represents an undefined value.
2. "x" represents an undefined value. Bits 9, 6, 4, and 3 are retained. The other bits are
initialized except those of which the initial values are undefined.