13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 620 of 1658
REJ09B0261-0100
(20) PCI Memory Bank Register 2 (PCIMBR2) This register specifies the upper 14 bits of the memory space address on the PCI bus for a memory read or write to the PCI memory space 2 by the CPU or DMAC. See section 13.4.3 (2), Accessing PCI Memory Space.
SH R/W:
PCI R/W:
SH R/W:
PCI R/W:
161718192021222324252627282931 30Bit:
Initial value:
RRR/WR/W
RRRR
R/WR/WR/WR/W
0000000000000000
——
——
RRRRRRRRRRRR
R/WR/WR/WR/WR/WR/WR/W R/W
0000000000000000
PMSBA2
01234567891011121315 14Bit:
Initial value:
Bit Bit Name
Initial
Value R/W Description
31 to 18 PMSBA2 All 0 SH: R/W
PCI:
PCI Memory Space 2 Bank Address (14 bits)
These bits specify a bank address for the PCI
memory space 2.
17 to 0 All 0 SH: R
PCI:
Reserved
These bits are always read as 0. The write value
should always be 0.