15. Clock Pulse Generator (CPG)

Rev.1.00 Jan. 10, 2008 Page 738 of 1658

REJ09B0261-0100

Table 15.3 Clock Operating Modes and Frequency Multiplication Ratio for Each Clock (Both MODE12 and MODE11 Are Set to High Level)
Frequency Multiplication Ratio (for Input Clock)
Clock
Operating
Mode
FRQMR1
Initial
Value
CPU
Clock
Ick
RAM
Clock
Uck
SuperHyway
Clock
SHck
GDTA
Clock
GAck
DU Clock
DUck
Peripheral
Clock
Pck
DDR
Clock
DDRck
Bus
Clock
Bck
0 H'1225 2448 × 36 × 18 × 18 × 9 × 9 × 3 × 18 × 6
1 H'122B 244B × 36 × 18 × 18 × 9 × 9 × 3/2 × 18 × 3/2
2 H'1335 3558 × 36 × 12 × 12 × 6 × 6 × 3 × 12 × 6
3 H'133B 355B × 36 × 12 × 12 × 6 × 6 × 3/2 × 12 × 3/2
16 H'1225 2448 × 18 × 9 × 9 × 9/2 × 9/2 × 3/2 × 9 × 3
17 H'122B 244B × 18 × 9 × 9 × 9/2 × 9/2 × 3/4 × 9 × 3/4
18 H'1335 3558 × 18 × 6 × 6 × 3 × 3 × 3/2 × 6 × 3
19 H'133B 355B × 18 × 6 × 6 × 3 × 3 × 3/4 × 6 × 3/4
Table 15.4 Clock Operating Modes and Frequency Multiplication Ratio for Each Clock (MODE12 or MODE11 Is Set to Low Level)
Frequency Multiplication Ratio (for Input Clock)
Clock
Operating
Mode
FRQMR1
Initial
Value
CPU
Clock
Ick
RAM
Clock
Uck
SuperHyway
Clock
SHck
GDTA
Clock
GAck
DU Clock
DUck
Peripheral
Clock
Pck
DDR
Clock
DDRck
Bus
Clock
Bck
0 H'1225 24F8 × 36 × 18 × 18 × 9 Stopped × 3 × 18 × 6
1 H'122B 24FB × 36 × 18 × 18 × 9 Stopped × 3/2 × 18 × 3/2
2 H'1335 35F8 × 36 × 12 × 12 × 6 Stopped × 3 × 12 × 6
3 H'133B 35FB × 36 × 12 × 12 × 6 Stopped × 3/2 × 12 × 3/2
16 H'1225 24F8 × 18 × 9 × 9 × 9/2 Stopped × 3/2 × 9 × 3
17 H'122B 24FB × 18 × 9 × 9 × 9/2 Stopped × 3/4 × 9 × 3/4
18 H'1335 35F8 × 18 × 6 × 6 × 3 Stopped × 3/2 × 6 × 3
19 H'133B 35FB × 18 × 6 × 6 × 3 Stopped × 3/4 × 6 × 3/4