13. PCI Controller (PCIC)

Rev.1.00 Jan. 10, 2008 Page 645 of 1658

REJ09B0261-0100

31
MSB LSB
0
PCI bus data
SHwy data
1. Little endian
A' B' C' D' A B C
A' B' C' D' A B C
ABCD
PCI_Addr[2] = 1
PCI_Addr[2] = 0
31
MSB LSB
0
PCI bus data
SHwy
data
DC B A D' C' B' A'
D C B A D' C' B' A'
A B C
PCI_Addr[2] = 0
PCI_Addr[2] = 1
2. Big endian
Note: PCIAddr[2]: PCI bus AD[2]
D
D
D
Buffer data
Buffer data
Figure 13.14 Endian Conversion from PCI Bus to SuperHyway Bus (Byte Swapping: TBS = 1)