5. Exception Handling
Rev.1.00 Jan. 10, 2008 Page 97 of 1658
REJ09B0261-0100
Exception Transition
Direction*3
Exception
Category
Execution
Mode
Exception
Priority
Level*2
Priority
Order*2
Vector
Address Offset
Exception
Code*4
Unconditional trap (TRAPA) 2 4 (VBR) H'100 H'160 General
exception
Completion
type User break after instruction
execution*
2 10 (VBR/DBR) H'100/— H'1E0
Nonmaskable interrupt 3 (VBR) H'600 H'1C0 Interrupt Completion
type General interrupt request 4 (VBR) H'600 —
Notes: 1. When UBDE i n CBCR = 1, PC = DBR. In other cases, PC = VBR + H'100.
2. Priority is first assigned by priority level, then by priority order within each level (the
lowest number represents the highest priority).
3. Control passes to H'A000 0000 in a reset, and to [VBR + offset] in other cases.
4. Stored in EXPEVT for a reset or general exception, and in INTEVT for an interrupt.