31. Register List

Rev.1.00 Jan. 10, 2008 Page 1510 of 1658

REJ09B0261-0100

Table 31.1 Register Address List
Module
Name Name Abbreviation R/W
P4 Area
Address
Area 7
Address
Access
Size
TRAPA exception register TRA R/W H'FF00 0020 H'1F00 0020 32
Exception
processing Exception event register EXPEVT R/W H'FF00 0024 H'1F00 0024 32
Interrupt event register INTEVT R/W H'FF00 0028 H'1F00 0028 32
Non-support detection exception register EXPMASK R/W H'FF2F 0004 H'1F2F 0004 32
MMU Page table entry high register PTEH R/W H'FF00 0000 H'1F00 0000 32
Page table entry low register PTEL R/W H'FF00 0004 H'1F00 0004 32
Translation table base register TTB R/W H'FF00 0008 H'1F00 0008 32
TLB exception address register TEA R/W H'FF00 000C H'1F00 000C 32
MMU control register MMUCR R/W H'FF00 0010 H'1F00 0010 32
Physical address space control register PASCR R/W H'FF00 0070 H'1F00 0070 32
Instruction re-fetch inhibit control register IRMCR R/W H'FF00 0078 H'1F00 0078 32
Page table entry assistance register PTEA R/W H'FF00 0034 H'1F00 0034 32
Cache Cache control register CCR R/W H'FF00 001C H'1F00 001C 32
Queue address control register 0 QACR0 R/W H'FF00 0038 H'1F00 0038 32
Queue address control register 1 QACR1 R/W H'FF00 003C H'1F00 003C 32
On-chip memory control register RAMCR R/W H'FF00 0074 H'1F00 0074 32
L memory L memory transfer source address register 0 LSA0 R/W H'FF000050 H'1F000050 32
L memory transfer source address register 1 LSA1 R/W H'FF000054 H'1F000054 32
L memory transfer destination address
register 0
LDA0 R/W H'FF000058 H'1F000058 32
L memory transfer destination address
register 1
LDA1 R/W H'FF00005C H'1F00005C 32
INTC Interrupt control register 0 ICR0 R/W H'FFD0 0000 H'1FD0 0000 32
Interrupt control register 1 ICR1 R/W H'FFD0 001C H'1FD0 001C 32
Interrupt priority register INTPRI R/W H'FFD0 0010 H'1FD0 0010 32
Interrupt source register INTREQ R/(W)*1 H'FFD0 0024 H'1FD0 0024 32
Interrupt mask register 0 INTMSK0 R/W H'FFD0 0044 H'1FD0 0044 32
Interrupt mask register 1 INTMSK1 R/W H'FFD0 0048 H'1FD0 0048 32
Interrupt mask register 2 INTMSK2 R/W H'FFD4 0080 H'1FD4 0080 32
Interrupt mask clear register 0 INTMSKCLR0 R/W H'FFD0 0064 H'1FD0 0064 32