3. Instruction Set
Rev.1.00 Jan. 10, 2008 Page 55 of 1658
REJ09B0261-0100

Instruction Operation Instruction Code Privileged T Bit New
MOVT Rn T Rn 0000nnnn00101001 — —
SWAP.B Rm,Rn Rm swap lower 2 bytes
Rn
0110nnnnmmmm1000 — —
SWAP.W Rm,Rn Rm swap upper/lower
words Rn
0110nnnnmmmm1001 — —
XTRCT Rm,Rn Rm:Rn middle 32 bits Rn 0010nnnnmmmm1101 — —

Note: * The assembler of Renesas uses the value after scaling (×1, ×2, or ×4) as the

displacement (disp).

Table 3.5 Arithmetic Operation Instructions
Instruction Operation Instruction Code Privileged T Bit New
ADD Rm,Rn Rn + Rm Rn 0011nnnnmmmm1100 — —
ADD #imm,Rn Rn + imm Rn 0111nnnniiiiiiii — —
ADDC Rm,Rn Rn + Rm + T Rn,
carry T
0011nnnnmmmm1110 — Carry
ADDV Rm,Rn Rn + Rm Rn,
overflow T
0011nnnnmmmm1111 — Overflow
CMP/EQ #imm,R0 When R0 = imm, 1 T
Otherwise, 0 T
10001000iiiiiiii — Comparison
result
CMP/EQ Rm,Rn When Rn = Rm, 1 T
Otherwise, 0 T
0011nnnnmmmm0000 — Comparison
result
CMP/HS Rm,Rn When Rn Rm (unsigned),
1 T
Otherwise, 0 T
0011nnnnmmmm0010 — Comparison
result
CMP/GE Rm,Rn When Rn Rm (signed),
1 T
Otherwise, 0 T
0011nnnnmmmm0011 — Comparison
result
CMP/HI Rm,Rn When Rn > Rm (unsigned),
1 T
Otherwise, 0 T
0011nnnnmmmm0110 — Comparison
result
CMP/GT Rm,Rn When Rn > Rm (signed),
1 T
Otherwise, 0 T
0011nnnnmmmm0111 — Comparison
result
CMP/PZ Rn When Rn 0, 1 T
Otherwise, 0 T
0100nnnn00010001 — Comparison
result
CMP/PL Rn When Rn > 0, 1 T
Otherwise, 0 T
0100nnnn00010101 — Comparison
result