7. Memory Management Unit (MMU)

Rev.1.00 Jan. 10, 2008 Page 173 of 1658

REJ09B0261-0100

Virtual address Physical address
31
1-Kbyte page
10 9 0
VPN Offset
28 10 9 0
PPN Offset
31
4-Kbyte page
1211 0
VPN Offset
28 1211 0
PPN Offset
31
64-Kbyte page
1615 0
VPN Offset
28 16 15 0
PPN Offset
31
8-Kbyte page
1312 0
VPN Offset
28 1312 0
PPN Offset
31
1-Mbyte page
2019 0
VPN Offset
28 2019 0
PPN Offset
31
4-Mbyte page
2221 0
VPN Offset
28 2221 0
PPN Offset
31
64-Mbyte page
2625 0
VPN Offset
28 26 25 0
PPN Offset
31
256-Kbyte page
1817 0
VPN Offset
28 1817 0
PPN Offset
Figure 7.12 Relationship between Page Size and Address Format (TLB Extended Mode) 7.4.2 Instruction TLB (ITLB) Configuration Figure 7.13 shows the configuration of the ITLB in TLB extended mode.
PPN[28:10]
PPN[28:10]
PPN[28:10]
PPN[28:10]
ESZ[3:0]
ESZ[3:0]
ESZ[3:0]
ESZ[3:0]
SH
SH
SH
SH
C
C
C
C
EPR[5]
EPR[5]
EPR[5]
EPR[5]
EPR[3]
EPR[3]
EPR[3]
EPR[3]
EPR[2]
EPR[2]
EPR[2]
EPR[2]
EPR[0]
EPR[0]
EPR[0]
EPR[0]
ASID[7:0]
ASID[7:0]
ASID[7:0]
ASID[7:0]
VPN[31:10]
VPN[31:10]
VPN[31:10]
VPN[31:10]
V
V
V
V
Entry 0
Entry 1
Entry 2
Entry 3
Note: Bits EPR[4], EPR[1],
D, and WT are not supported.
Figure 7.13 ITLB Configuration (TLB Extended Mode)