13. PCI Controller (PCIC)

Rev.1.00 Jan. 10, 2008 Page 637 of 1658

REJ09B0261-0100

MSB
31 0
LSB
SHwy data
PCI bus data
1. Little endian
A' B' C' D' A B
C
A' B' C' D' A B
A B C
PCI_Addr[2] = 1
PCI_Addr[2] = 0
31 0
SHwy data
PCI bus data
2. Big endian
A B C D A' B' C' D'
ABC
PCI_Addr[2] = 0
PCI_Addr[2] = 1
Note: PCIAddr[2]: PCI bus AD[2]
D
Buffer data
Buffer data
D
CD
MSB LSB
A B C D A' B' C' D'
D
Figure 13.7 Endian Conversion from SuperHyway Bus to PCI Bus (Non-Byte Swapping: TBS = 0)