Omron FQM1-MMP21 Auxiliary Area Allocations, Appendix D, Sequence Control Instructions

Auxiliary Area Allocations Appendix D

Note When a double-length operand is used, add 1 to the value shown in the length column in the above table.

Sequence Control Instructions

Instruction	Mnemonic	Code	Length	ON execution	Hardware	Conditions
			(steps)	time (∝s)	implementation
			(See
			note.)
END	END	001	1	7.0	Yes	---
NO OPERATION	NOP	000	1	0.05	Yes	---
INTERLOCK	IL	002	1	0.15	Yes	---
INTERLOCK CLEAR	ILC	003	1	0.15	Yes	---
JUMP	JMP	004	2	0.95	Yes	---
JUMP END	JME	005	2	---	---	---

Note When a double-length operand is used, add 1 to the value shown in the length column in the above table.

Timer and Counter Instructions

Instruction	Mnemonic	Code	Length	ON execution	Hardware	Conditions
			(steps)	time (∝s)	implementation
			(See
			note.)
TIMER	TIM	---	3	1.30	Yes	---
COUNTER	CNT	---	3	1.30	Yes	---
HIGH-SPEED TIMER	TIMH	015	3	1.80	Yes	---
ONE-MS TIMER	TMHH	540	3	1.75	Yes	---
REVERSIBLE	CNTR	012	3	24.8	---	---
COUNTER

Note When a double-length operand is used, add 1 to the value shown in the length column in the above table.

Comparison Instructions

Instruction	Mnemonic	Code	Length	ON execution	Hardware	Conditions
			(steps)	time (∝s)	implementation
			(See
			note.)
Input Comparison	LD, AND, OR +=	300	4	0.35	Yes	---
Instructions (unsigned)
	LD, AND, OR + <>	305
	LD, AND, OR + <	310
	LD, AND, OR +<=	315
	LD, AND, OR +>	320
	LD, AND, OR +>=	325
Input Comparison	LD, AND, OR +=+L	301	4	0.35	Yes	---
Instructions (double,
	LD, AND, OR +<>+L	306
unsigned)
	LD, AND, OR +<+L	311
	LD, AND, OR +<=+L	316
	LD, AND, OR +>+L	321
	LD, AND, OR +>=+L	326
Input Comparison	LD, AND, OR +=+S	302	4	0.35	Yes	---
Instructions (signed)
	LD, AND, OR +<>+S	307
	LD, AND, OR +<+S	312
	LD, AND, OR +<=+S	317
	LD, AND, OR +>+S	322
	LD, AND, OR +>=+S	327

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