Omron FQM1-CM001, FQM1-MMA21 Allocations Related to Built-inInputs, Appendix C, Input Interrupts

Models: FQM1-MMP21 FQM1-MMA21 FQM1-CM001

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Appendix C

System Setup, Auxiliary Area Allocations, and Built-in I/O Allocations

Appendix C

 

 

 

 

 

 

 

 

 

 

 

 

Address

 

Bits

 

Name

 

 

Function

 

Controlled

 

 

 

 

 

 

 

 

 

 

 

by

A611

00

High-speed

Start Bit

 

 

Same as command bits for high-speed counter 1.

 

User

 

 

 

counter 2 com-

 

 

 

 

 

 

 

 

01

Reset Bit

 

 

 

 

 

 

mand bits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

02

 

 

Measurement

 

 

 

 

 

 

 

 

 

Start Bit

 

 

 

 

 

 

03

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

04

 

 

Range Com-

 

 

 

 

 

 

 

 

 

parison Results

 

 

 

 

 

 

 

 

 

Clear Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

05

 

 

Absolute Off-

 

 

 

 

 

 

 

 

 

set Preset Bit

 

 

 

 

 

06

 

 

Absolute

 

 

 

 

 

 

 

 

 

 

Present Value

 

 

 

 

 

 

 

 

 

Preset Bit

 

 

 

 

 

07

 

 

Absolute Num-

 

 

 

 

 

 

 

 

 

ber of Rota-

 

 

 

 

 

 

 

 

 

tions Read Bit

 

 

 

 

 

08

 

 

Latch Input 1

 

 

 

 

 

 

 

 

 

Enable Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

09

 

 

Latch Input 2

 

 

 

 

 

 

 

 

 

Enable Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10 to 15

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A612

 

00 to 15

High-speed

Range Com-

 

Contains the CTBL(882) execution results for range comparison.

Module

 

 

 

counter 1 moni-

parison Execu-

Bits 00 to 15 correspond to ranges 1 to 16.

 

 

 

 

 

tor data

tion Results

 

OFF: No match

 

 

 

 

 

 

 

Flags

 

 

ON: Match

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A613

 

00 to 15

 

 

Output Bit Pat-

Contains the output bit pattern when a match is found for

 

 

 

 

 

 

 

tern

 

 

CTBL(882) execution results for range comparison

 

 

 

 

 

 

 

 

 

 

 

Note If more than one match is found, an OR of the output bit pat-

 

 

 

 

 

 

 

 

 

 

terns with matches will be stored here.

 

 

A614

 

00 to 15

High-speed

Range Com-

Same as for high-speed counter 1 monitor data.

 

 

 

 

 

counter 2 moni-

parison Results

 

 

 

 

 

 

 

tor data

 

 

 

 

 

 

A615

 

00 to 15

Output Bit Pat-

 

 

 

 

 

 

 

 

 

tern

 

 

 

 

 

Allocations Related to Built-in Inputs

 

 

Input Interrupts

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address

 

Bits

 

Name

 

 

 

 

Function

Controlled by

 

 

 

 

 

 

 

A520

 

00 to 15

Interrupt Counter 0

 

Used for interrupt input 0 in counter mode.

User

 

 

 

 

Counter SV

 

 

Sets the count value at which the interrupt task will start. Interrupt task

 

 

 

 

 

 

 

 

 

000 will start when interrupt counter 0 has counted this number of

 

 

 

 

 

 

 

 

 

pulses.

 

 

 

 

 

 

 

 

 

 

Setting range: 0000 to FFFF

 

 

 

 

 

 

 

 

 

 

A521

 

00 to 15

Interrupt Counter 1

 

Used for interrupt input 1 in counter mode.

 

 

 

 

 

 

Counter SV

 

 

Sets the count value at which the interrupt task will start. Interrupt task

 

 

 

 

 

 

 

 

 

001 will start when interrupt counter 1 has counted this number of

 

 

 

 

 

 

 

 

 

pulses.

 

 

 

 

 

 

 

 

 

 

Setting range: 0000 to FFFF

 

 

 

 

 

 

 

 

 

 

A522

 

00 to 15

Interrupt Counter 2

 

Used for interrupt input 2 in counter mode.

 

 

 

 

 

 

Counter SV

 

 

Sets the count value at which the interrupt task will start. Interrupt task

 

 

 

 

 

 

 

 

 

002 will start when interrupt counter 2 has counted this number of

 

 

 

 

 

 

 

 

 

pulses.

 

 

 

 

 

 

 

 

 

 

Setting range: 0000 to FFFF

 

 

 

 

 

 

 

 

 

 

A523

 

00 to 15

Interrupt Counter 3

 

Used for interrupt input 3 in counter mode.

 

 

 

 

 

 

Counter SV

 

 

Sets the count value at which the interrupt task will start. Interrupt task

 

 

 

 

 

 

 

 

 

003 will start when interrupt counter 3 has counted this number of

 

 

 

 

 

 

 

 

 

pulses.

 

 

 

 

 

 

 

 

 

 

Setting range: 0000 to FFFF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

343

Page 366
Image 366
Omron FQM1-CM001, FQM1-MMA21, FQM1-MMP21 operation manual Allocations Related to Built-inInputs, Appendix C, Input Interrupts