Omron FQM1-MMP21, FQM1-CM001, FQM1-MMA21 operation manual 165

Pulse Inputs Section 7-5

High-speed
Counter PV	PV reset on
PV reset on
phase-Z signal	phase-Z signal
10000
Range 3
7500
Range 2
2500
Range 1
0	Time

A612: 0001 hex 0002 hex 0004 hex 0008 hex	0002 hex	0008 hex
0001 hex		0004 hex	0001 hex

Content of A612

Internal bit pattern

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 1 (0001 hex) Content is transferred to CIO 0001 to turn ON CIO 0001.00.

0 0 0 0 0 0 0 0 0 0

0 0 0 0 1 0 (0002 hex) Content is transferred to CIO 0001 to turn ON CIO 0001.01.

0 0 0 0 0 0 0 0 0 0

0 0 0 1 0 0 (0004 hex) Content is transferred to CIO 0001 to turn ON CIO 0001.02.

0 0 0 0 0 0 0 0 0 0

0 0 1 0 0 0 (0008 hex) Content is transferred to CIO 0001 to turn ON CIO 0001.03.

P_On

		A610.00
(Always ON)
	Start high-speed
		counter.
		A610.01
		Reset Bit
P_On			CTBL
		#0001
(Always ON)
		#0001
			D00000

MOV A613 0001

Starts high-speed counter 1.

Turns ON the High-speed Counter 1 Reset Bit.

Continually compares the high-speed counter PV from high-speed counter 1 with the specified ranges.(In this case, the comparison table begins at D00000.)

Transfers the internal bit pattern from A613 to CIO 0001.

D00000	0 0 0 4
D00001	0 0 0 0
D00002	0 0 0 0
D00003	2 5 0 0
D00004	0 0 0 0
D00005	0 0 0 1
D00006	2 5 0 1
D00007	0 0 0 0
D00008	7 5 0 0
D00009	0 0 0 0
D00010	0 0 0 2
D00011	7 5 0 1
D00012	0 0 0 0
D00013	0 0 0 0
D00014	0 0 0 1
D00015	0 0 0 4
D00016	0 0 0 1
D00017	0 0 0 1
D00018	F F F F
D00019	7 F F F
D00020	0 0 0 8

4 comparison conditions

Lower limit A 0

Range A

Upper limit A 2500 Bit pattern

Lower limit B 2501

Range B

Upper limit B 7500 Bit pattern

Lower limit C 7501

Range C

Upper limit C 10000 Bit pattern

Lower limit D 10001

Range D

Upper limit D 7FFFFFFF Bit pattern

END

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