Motorola DSP56000, 24-Bit Digital Signal Processor manual Special Addressing I/O Short Address

INSTRUCTION GROUPS

EXAMPLE: MOVEP A1, X:<<$FFFE
			BEFORE EXECUTION
	A2		A1		A0
55	48 47		24 23		0
	X X		1 2 3 4	5 6	X X X X X X

		AFTER EXECUTION
A2		A1		A0
55	48 47		24 23		0
X X		1 2 3 4	5 6	X X X X X X

7	0 23	0 23	0		7	0 23	0 23		0
		X MEMORY						X MEMORY
		23	0				23		0
	$FFFF						$FFFF
	$FFFE	0 0 F F F	F*				$FFFE	0 0 3 4 5	6
				I/O SHORT
				ABSOLUTE
				ADDRESS
	$FFC0				SPACE		$FFC0

*Contents of Bus Control Register (X:$FFFE) After Reset

Assembler Syntax: pp

Operands Referenced: X:, Y Memories

Additional Instruction Execution Time (Clocks): 0

Additional Effective Address Words: 0

Figure 6-12 Special Addressing – I/O Short Address

ALU, execute in one instruction cycle. These instructions may affect all of the CCR bits. Arithmetic instructions are register based (register direct addressing modes used for oper- ands) so that the data ALU operation indicated by the instruction does not use the XDB, the YDB, or the global data bus (GDB). Optional data transfers may be specified with most arithmetic instructions, which allows for parallel data movement over the XDB and YDB or over the GDB during a data ALU operation. This parallel movement allows new data to be prefetched for use in subsequent instructions and allows results calculated in previous instructions to be stored. The following list contains the arithmetic instructions:

MOTOROLA INSTRUCTION SET INTRODUCTION 6 - 21