EXCEPTION PROCESSING STATE (INTERRUPT PROCESSING)
MOTOROLA
PROCESSING STATES 7 - 19
I1
I2
MAIN
PROGRAM
FETCHES
II (NOP)
n6
NO FETCH
NO FETCH
INFINITE
LOOP
FAST INTERRUPT
SERVICE ROUTINE
FETCHES
Figure 7-4 Illegal Instruction Interrupt Serviced by a Fast Interrupt
INTERRUPT CONTROL CYCLE 1 i
INTERRUPT CONTROL CYCLE 2 i
FETCH n1 n2 n3 n4 n5 n6 — — ii1 ii2 n5
DECODE n1 n2 n3 n4 II — — — ii1 ii2 II
EXECUTE n1 n2 n3 n4 NOP — — — ii1 ii 2 NOP
INSTRUCTION CYCLE COUNT 1 2 3 4 5 6 7 8 9 10111213 14
i = INTERRUPT
ii = INTERRUPT INSTRUCTION WORD
II = ILLEGAL INSTRUCTION
n = NORMAL INSTRUCTION WORD
ILLEGAL INSTRUCTION INTERRUPT
RECOGNIZED AS PENDING
ILLEGAL INSTRUCTION INTERRUPT
RECOGNIZED AS PENDING
(a) Instruction Fetches from Memory
(b) Program Controller Pipeline