Motorola DSP56000, 24-Bit Digital Signal Processor Effective Addressing Mode, Dest. Addr. Reg. D

INSTRUCTION DESCRIPTIONS

LUA

Load Updated Address

LUA

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3	2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U	N	Z		V	C
				MR									CCR

The condition codes are not affected by this instruction.

Instruction Format:

LUA ea,D

Opcode:

2316 158 70

0 0 0 0 0 1 0 0 0 1 0 M M R R R 0 0 0 1 d d d d

Instruction Fields:

ea=5-bit Effective Address=MMRRR, D=4-bit destination address register=dddd

Effective
Addressing Mode	M M M R R R						Dest. Addr. Reg. D	d	d	d d
(Rn)-Nn	0	0	0	r	r	r	R0–R7	0	n	n	n
(Rn)+Nn	0	0	1	r	r	r	N0–N7	1	n	n	n
(Rn)-	0	1	0	r	r	r
(Rn)+	0	1	1	r	r	r

where “rrr” refers to asource address register R0–R7

where “nnn” refers to adestination address register R0–R7 or N0–N7

Timing: 4 oscillator clock cycles

Memory: 1 program word

MOTOROLA INSTRUCTION SET DETAILS A - 149