Motorola 24-Bit Digital Signal Processor, DSP56000 manual Programming Model, Addressing

SECTION CONTENTS

SECTION 4.1 ADDRESS GENERATION UNIT AND ADDRESSING MODES ....	3
SECTION 4.2 AGU ARCHITECTURE	3
4.2.1 Address Register Files (Rn)	3
4.2.2 Offset Register Files (Nn)	4
4.2.3 Modifier Register Files (Mn)	5
4.2.4 Address ALU	5
4.2.5 Address Output Multiplexers	6
SECTION 4.3 PROGRAMMING MODEL	6
4.3.1 Address Register Files (R0 - R3 and R4 - R7)	7
4.3.2 Offset Register Files (N0 - N3 and N4 - N7)	7
4.3.3 Modifier Register Files (M0 - M3 and M4 - M7)	8
SECTION 4.4 ADDRESSING	8
4.4.1 Address Register Indirect Modes	9
4.4.1.1 No Update	9
4.4.1.2 Postincrement By 1	9
4.4.1.3 Postdecrement By 1	9
4.4.1.4 Postincrement By Offset Nn	10
4.4.1.5 Postdecrement By Offset Nn	11
4.4.1.6 Indexed By Offset Nn	12
4.4.1.7 Predecrement By 1	13
4.4.2 Address Modifier Arithmetic Types	14
4.4.2.1 Linear Modifier (Mn=$FFFF)	16
4.4.2.2 Modulo Modifier	18
4.4.2.3 Reverse-Carry Modifier (Mn=$0000)	22
4.4.2.4 Address-Modifier-Type Encoding Summary	25

4 - 2 ADDRESS GENERATION UNIT MOTOROLA