Motorola DSP56000, 24-Bit Digital Signal Processor manual Example, CMP X0,A

INSTRUCTION DESCRIPTIONS

Tcc

Transfer Conditionally

Tcc

tion accumulator D1. If address register S2 is used as an address pointer into an array of data, the address of the desired value is stored in the address register D2. The Tcc instruction may be used after any instruction and allows efficient searching and sorting algorithms.

The Tcc instruction uses the internal data ALU paths and internal address ALU paths. The Tcc instruction does not affect the condition code bits.

Note: This instruction is considered to be a move-type instruction. Due to instruction pipelining, if an AGU register (Mn, Nn, or Rn) is directly changed with this instruction, the new contents may not be available for use until the second following instruction. See the restrictions discussed in A.9.6 - R, N, and M Register Restrictions on page A-page 310.

Example:

:
CMP X0,A	;compare X0 and A (sort for minimum)
TGT X0,A R0,R1	;transfer X0 ➞ A and R0 ➞ R1 if X0<A
:

Explanation of Example: In this example, the contents of the 24-bit X0 register are transferred to the 56-bit A accumulator, and the contents of the 16-bit R0 address regis- ter are transferred to the 16-bit R1 address register if the specified condition is true. If the specified condition is not true, a NOP is executed.

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3	2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U	N	Z		V	C
				MR									CCR

The condition codes are not affected by this instruction.

MOTOROLA INSTRUCTION SET DETAILS A - 285