Motorola DSP56000 manual Shift Left and Subtract Accumulators Subl Condition Codes, Subl S,D

INSTRUCTION DESCRIPTIONS

SUBL

Shift Left and Subtract Accumulators SUBL

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3		2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U		N	Z		V	C
				MR										CCR

S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION L — Set if limiting (parallel move) or overflow has occurred in result

E — Set if the signed integer portion of A or B result is in use U — Set if A or B result is unnormalized

N — Set if bit 55 of A or B result is set Z — Set if A or B result equals zero

V — Set if overflow has occurred in A or B result or if the MS bit of the destination operand is changed as a result of the instruction’s left shift

C — Set if a carry (or borrow) occurs from bit 55 of A or B result

Note: The definitions of the E and U bits vary according to the scaling mode being used. Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.

Instruction Format:

SUBL S,D

Opcode:

23		8	7	4	3	0
	DATA BUS MOVE FIELD		0 0 0 1		d	1 1 0

OPTIONAL EFFECTIVE ADDRESS EXTENSION

Instruction Fields:

S,D d

B,A 0

A,B 1

Timing: 2+mv oscillator clock cycles

Memory: 1+mv program words

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