Motorola 24-Bit Digital Signal Processor Transfer Data ALU Register, Operation Assembler Syntax

INSTRUCTION DESCRIPTIONS

	TFR	Transfer Data ALU Register	TFR
Operation:		Assembler Syntax:
	S➞D (parallel move)	TFR S,D (parallel move)

Description: Transfer data from the specified source data ALU register S to the speci- fied destination data ALU accumulator D. TFR uses the internal data ALU data paths; thus, data does not pass through the data shifter/limiters. This allows the full 56-bit con- tents of one of the accumulators to be transferred into the other accumulator without data shifting and/or limiting. Moreover, since TFR uses the internal data ALU data paths, parallel moves are possible. The TFR instruction only affects the L condition code bit which can be set by data limiting associated with the instruction’s parallel move opera- tions.

Example:

:

TFR A,B A,X1 Y:(R4+N4),Y0 ;move A to B and X1, update Y0

:

A

Before Execution

$01:234567:89ABCD

A

After Execution

$01:234567:89ABCD

B

$FF:FFFFFF:FFFFFF

B

$01:234567:89ABCD

Explanation of Example: Prior to execution, the 56-bit A accumulator contains the value $01:234567:89ABCD, and the 56-bit B accumulator contains the value $ff:FFFFFF:FFFFFF. The execution of the TFR A,B instruction moves the 56-bit value in the A accumulator into the 56-bit B accumulator using the internal data ALU data paths without any data shifting and/or limiting. The value in the B accumulator would have been limited if a MOVE A,B instruction had been used. Note, however, that the parallel move portion of the TFR instruction does use the data shifter/limiters. Thus, the value stored in the 24-bit X1 register (not shown) would have been limited in this example. This example illustrates a triple move instruction.

A - 288 INSTRUCTION SET DETAILS MOTOROLA