ADDRESSING
4 - 12 ADDRESS GENERATION UNIT
MOTOROLA
ify the contents of Rn without an associated data move.
4.4.1.6 Indexed By Offset Nn
The address of the operand is the sum of the contents of the address register, Rn, and
the contents of the address offset register, Nn (see Table 4-1 and Figure 4-9). The con-
tents of the Rn and Nn registers are unchanged. This addressing mode, which requires
123 1 2 3 4564 5 6
15 0
15 0
15 0
EXAMPLE: MOVE Y0,Y: (R3)-
BEFORE EXECUTION AFTER EXECUTION
Y1 Y0
47 24 23 0
23 0 23 0
Y MEMORY
23 0
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$4734
Y MEMORY
23 0
$4734
$4735
XXXX
$FFFF
R3
N3
M3
15 0
15 0
15 0
$4734
XXXX
$FFFF
R3
N3
M3
Assembler Syntax: (Rn)–
Memory Spaces: P:, X:, Y:, XY:, L:
Additional Instruction Execution Time (Clocks): 0
Additional Effective Address Words: 0
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$4735 $4735
123 1 23 45 6 456
Y1 Y0
47 24 23 0
23 0 23 0
456456
XXXXXX
Figure 4-6 Address Register Indirect — Postdecrement