Motorola 24-Bit Digital Signal Processor, DSP56000 manual 128 3846 256 8656 512 19296

BENCHMARK PROGRAMS

;Intermediate Passes -- W(n) < 1

;A---\ /---A’= Re[ A + jC + (B - jD)W(k) ] = A+BWr+DWi=A+T1

;B----\__/----B’= Im[ A + jC - (B - jD)W(k) ] = C+DWr-BWi=T2+C

;C----/ \----C’= Re[ A + jC - (B - jD)W(k) ] = A-(BWr+DWi)=A-T1

;D---/ \---D’= Im[-A - jC - (B - jD)W(k) ] = -C+DWr-BWi=T2-C

;______________________________

move	x:(r0)+,x1 y:(r4)-,y1		;x1=b, y1=d, r4 ptr back to c
mpy	x1,y0,B x:(r3)+,r7		;A=bWr,
mac	x0,y1,B x:(r3)+,r1		;B=bWr+dWi=T1, get first index
sub	B,A		;A=a-T1=c’, get second index
addl	A,B	A,x:(r1)	;B=a+T1=a’, PUT c’ to x:b
mpy	y1,y0,A B,x:(r7)		;B=dWr, B=c PUT a’
mac	-x1,x0,A y:(r4)+n4,B		;A=dWi-bWr=T2, B=c, r4 ptr to next c
sub	B,A	x:(r2)+,x0 y:(r6)+,y0	;A=T2-c=d’,x0=next Wi, y0=next Wr
addl	A,B	A,y:(r1)	;B=T2+c=b’, update r4, A=next a, PUT d’
move	x:(r0)+,A B,y:(r7)		;PUT b’, A=next a
move	y:(r4)+,B		;B=next c

end_lastg

endm

;Real input FFT based on Glenn Bergland algorithm

;Normal order input and normal order output.

;Since 56001 does not support Bergland addressing, extra instruction cycles are needed

;for converting Bergland order to normal order.It has been done in the last pass by

;looking at the bergtable.

;'bergsincos' generates sin and cos table with size of points/4,COS in Y, SIN in X

;'bergorder' generates table for address conversion, the size of twiddle factors is half

;of FFT output's

;'rfft-56b' does FFT

;

;Normal order input and normal order output.

;Real input data are split into two parts, the first part is put in X, the second in Y.

;Real output data are in X, imaginary output data are in Y.

;The first real output is DC

;The first imaginary output is the Nyquist frequency.

;Note that only DC to Nyquist frequency range is calculated by this algorithm

;After twiddle factors and bergtable are generated, you may overwrite 'bergorder',

;'norm2berg' by 'rfft-56b' for saving P memory.

;
;
Performance
;----------------------------------------------------------------
; Real input data points		Clock cycle
;	64	1686
;	128	3846
;	256	8656
;	512	19296

MOTOROLA BENCHMARK PROGRAMS B - 25