Motorola 24-Bit Digital Signal Processor, DSP56000 manual Repeat Next Instruction, Temp LC

INSTRUCTION DESCRIPTIONS

	REP	Repeat Next Instruction	REP
Operation:		Assembler Syntax:
	LC ➞ TEMP; X:ea ➞ LC	REP	X:ea
	Repeat next instruction until LC=1
	TEMP ➞ LC
	LC ➞ TEMP; X:aa ➞ LC	REP	X:aa
	Repeat next instruction until LC=1
	TEMP ➞ LC
	LC ➞ TEMP; Y:ea ➞ LC	REP	Y:ea
	Repeat next instruction until LC=1
	TEMP ➞ LC
	LC ➞ TEMP; Y:aa ➞ LC	REP	Y:aa
	Repeat next instruction until LC=1
	TEMP ➞ LC
	LC ➞ TEMP; S ➞ LC	REP	S
	Repeat next instruction until LC=1
	TEMP ➞ LC
	LC ➞ TEMP; #xxx ➞ LC	REP	#xxx

Repeat next instruction until LC=1

TEMP ➞ LC

Description: Repeat the single-word instruction immediately following the REP instruction the specified number of times. The value specifying the number of times the given instruction is to be repeated is loaded into the 16-bit loop counter (LC) register. The single-word instruction is then executed the specified number of times, decrement- ing the loop counter (LC) after each execution until LC=1. When the REP instruction is in effect, the repeated instruction is fetched only one time, and it remains in the instruction register for the duration of the loop count. Thus, the REP instruction is not interrupt- ible (sequential repeats are also not interruptible). The current loop counter (LC) value is stored in an internal temporary register. If LC is set equal to zero, the instruction is repeated 65,536 times. The instruction’s effective address specifies the address of the value which is to be loaded into the loop counter (LC). All address register indirect addressing modes may be used. The absolute short and the immediate short addressing modes may also be used. The four MS bits of the 12-bit immediate value are zeroed to form the 16-bit value that is to be loaded into the loop counter (LC).

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