Motorola 24-Bit Digital Signal Processor, DSP56000 Jump to Subroutine, Operation Assembler Syntax

INSTRUCTION DESCRIPTIONS

	JSR	Jump to Subroutine		JSR
Operation:			Assembler Syntax:
SP+1➞SP; PC➞SSH; SR➞SSL; 0xxx➞PC			JSR	xxx
SP+➞SP; PC➞SSH; SR➞SSL; ea➞PC			JSR	ea

Description: Jump to the subroutine whose location in program memory is given by the instruction’s effective address. The address of the instruction immediately following the JSR instruction (PC) and the system status register (SR) is pushed onto the system stack. Program execution then continues at the specified effective address in program memory. All memory alterable addressing modes may be used for the effective address. A fast short jump addressing mode may also be used. The 12-bit data is zero extended to form the effective address.

Restrictions: A JSR instruction used within a DO loop cannot specify the loop address (LA) as its target.

A JSR instruction used within a DO loop cannot begin at the address LA within that DO loop.

A JSR instruction cannot be repeated using the REP instruction.

Example:

:
JSR (R5)+	;jump to subroutine at (R5), update R5
:

Explanation of Example: In this example, program execution is transferred to the sub- routine at address P:(R5) in program memory, and the contents of the R5 address regis- ter are then updated.

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3	2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U	N	Z		V	C
				MR									CCR

The condition codes are not affected by this instruction.

A - 136 INSTRUCTION SET DETAILS MOTOROLA