Motorola 24-Bit Digital Signal Processor, DSP56000 Integer/Fractional Multiplication Comparison

DATA REPRESENTATION AND ROUNDING

SIGNED MULTIPLICATION N x N -2N – 1 BITS

INTEGER FRACTIONAL

S				S
		SIGNED MULTIPLIER
			.
S			.
	S	MSP	.	LSP	•

2N — 1 PRODUCT SIGN EXTENSION 2N BITS

S				S
		SIGNED MULTIPLIER
			.
			.		0
	S•	MSP	.	LSP

2N — 1 PRODUCT

ZERO FILL

2N BITS

Figure 3-9 Integer/Fractional Multiplication Comparison

and rounds down any value below one-half. The question arises as to which way one- half should be rounded. If it is always rounded one way, the results will eventually be biased in that direction. Convergent rounding solves the problem by rounding down if the number is odd (LSB=0) and rounding up if the number is even (LSB=1). Figure 3-10shows the four cases for rounding a number in the A1 (or B1) register. If scaling is set in the status register, the resulting number will be rounded as it is put on the data bus. How- ever, the contents of the register are not scaled.

3 - 14 DATA ARITHMETIC LOGIC UNIT MOTOROLA