Motorola DSP56000, 24-Bit Digital Signal Processor manual Address ALU Registers Operands

NOTATION

		Table A-1 Instruction Description Notation
			Data ALU Registers Operands
Xn	Input Register X1 or X0 (24 Bits)
Yn	Input Register Y1 or Y0 (24 Bits)
An	Accumulator Registers A2, A1, A0 (A2 — 8 Bits, A1 and A0 — 24 Bits)
Bn	Accumulator Registers B2, B1, B0 (B2 — 8 Bits, B1 and B0 — 24 Bits)

XInput Register X = X1: X0 (48 Bits)

YInput Register Y = Y1: Y0 (48 Bits)

AAccumulator A = A2: A1: A0 (56 Bits)*

BAccumulator B = B2: B1: B0 (56 BIts)*

AB	Accumulators A and B = A1: B1 (48 Bits)*
BA	Accumulators B and A = B1: A1 (48 Bits)*
A10	Accumulator A = A1: A0 (48 Bits)
B10	Accumulator B= B1:B0 (48 bits)

*NOTE: In data move operations, shifting and limiting are performed when this register is specified as a source operand. When specified as a destination operand, sign extension and possibly zeroing are performed.

Rn

Nn

Mn

Address ALU Registers Operands

Address Registers R0 - R7 (16 Bits)

Address Offset Registers N0 - N7 (16 Bits)

Address Modifier Registers M0 - M7 (16 Bits)

MOTOROLA INSTRUCTION SET DETAILS A - 5