INSTRUCTION DESCRIPTIONS
MOTOROLA INSTRUCTION SET DETAILS A - 183
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move.
Class I Instruction Format:
( . . . . . ) X:ea,D1 S2,D2
( . . . . . ) S1,X:ea S2, D2
( . . . . . ) #xxxxxx, S2,D2
Opcode:
Instruction Fields:
ea=6-bit Effective Address=MMMRRR
Effective
Register W Addressing Mode M M M R R R
Read S 0 (Rn)-Nn 0 0 0 r r r
Write D 1 (Rn)+Nn 0 0 1 r r r
(Rn)- 0 1 0 r r r
(Rn)+ 0 1 1 r r r
(Rn) 1 0 0 r r r
(Rn+Nn) 1 0 1 r r r
-(Rn) 1 1 1 r r r
Absolute address 1 1 0 0 0 0
Immediate data 1 1 0 1 0 0
where “rrr” refers to an address register R0–R7
MR CCR
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LF DM T ** S1 S0 I1 I0 S L E U N Z V C
23 16 15 8 7 0
OPTIONAL EFFECTIVE ADDRESS EXTENSION
0 0 0 1 f f d f W 0 M M M R R R INSTRUCTION OPCODE
X:R X Memory and Register Data Move X:R