Motorola DSP56000, 24-Bit Digital Signal Processor manual Condition Codes, Ccr Omr

INSTRUCTION DESCRIPTIONS

ANDI

AND Immediate with Control Register ANDI

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3	2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U	N	Z		V	C
				MR									CCR

For CCR Operand:

S — Cleared if bit 7 of the immediate operand is cleared

L — Cleared if bit 6 of the immediate operand is cleared

E — Cleared if bit 5 of the immediate operand is cleared

U — Cleared if bit 4 of the immediate operand is cleared

N — Cleared if bit 3 of the immediate operand is cleared

Z — Cleared if bit 2 of the immediate operand is cleared

V — Cleared if bit 1 of the immediate operand is cleared

C — Cleared if bit 0 of the immediate operand is cleared

For MR and OMR Operands: The condition codes are not affected using these oper- ands.

Instruction Format:

AND(I) #xx,D

Opcode:

	23	16	15						8	7		0
0 0 0 0 0 0 0		0	i i	i	i	i	i	i	i	1	0	1 1 1 0 E E

Instruction Fields:

#xx=8-bit Immediate Short Data — i i i i i i i i

D	E E
MR	0 0
CCR	0 1
OMR	1 0

Timing: 2 oscillator clock cycles

Memory: 1 program word

MOTOROLA INSTRUCTION SET DETAILS A - 35