Motorola 24-Bit Digital Signal Processor, DSP56000 manual Or Immediate with Control Register

INSTRUCTION DESCRIPTIONS

	ORI	OR Immediate with Control Register	ORI
Operation:		Assembler Syntax:
	#xx+D ➞ D	OR(I) #xx,D

where + denotes the logical inclusive OR operator

Description: Logically OR the 8-bit immediate operand (#xx) with the contents of the destination control register D and store the result in the destination control register. The condition codes are affected only when the condition code register is specified as the destination operand.

Restrictions: The ORI #xx,MR instruction cannot be used immediately before an ENDDO or RTI instruction and cannot be one of the last three instructions in a DO loop (at LA–2, LA–1, or LA).

Example:

:
OR #$8,MR	;set scaling mode bit S1 to scale up
:

MR

Before Execution

$03

MR

After Execution

$0B

Explanation of Example: Prior to execution, the 8-bit mode register (MR) contains the value $03. The OR #$8,MR instruction logically ORs the immediate 8-bit value $8 with the contents of the mode register and stores the result in the mode register.

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3		2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U		N	Z		V	C
				MR										CCR

For CCR operand:

S — Set if bit 7 of the immediate operand is set

L — Set if bit 6 of the immediate operand is set

E — Set if bit 5 of the immediate operand is set

U — Set if bit 4 of the immediate operand is set

N — Set if bit 3 of the immediate operand is set

Z — Set if bit 2 of the immediate operand is set

V — Set if bit 1 of the immediate operand is set

C — Set if bit 0 of the immediate operand is set

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