Motorola DSP56000, 24-Bit Digital Signal Processor manual Memory Data Move Example, Condition Codes

INSTRUCTION DESCRIPTIONS

X: X Memory Data Move X:

Note:Due to instruction pipelining, if an AGU register (Mn, Nn, or Rn) is directly changed with this instruction, the new contents may not be available for use until the second fol- lowing instruction. See the restrictions discussed in A.9.6 - R, N, and M Register Restric- tions on page A-page 310.

Example:

:

ASL A R2,X:–(R2);A∗2➞A, save updated R2 in X:(R2)

:

R2

Before Execution

$1001

R2

After Execution

$1000

X:$1000

$000000

X:$1000

$001000

Explanation of Example: Prior to execution, the 16-bit R2 address register contains the

value $1001, and the 24-bit X memory location X:$1000 contains the value $000000. The execution of the parallel move portion of the instruction, R2,X:–(R2), predecrements the R2 address register and then uses the R2 address register to move the updated con- tents of the R2 address register into the 24-bit X memory location X:$1000.

Condition Codes:

15	14	13	12	11	10	9		8	7	6	5	4	3	2	1		0
LF	DM	T	**	S1	S0		I1	I0	S	L	E	U	N	Z		V	C
			MR									CCR

S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION. L — Set if data limiting has occurred during parallel move.

Note: The MOVE A,X:ea operation will result in a 24-bit positive or negative saturation constant being stored in the specified 24-bit X memory location if the signed integer por- tion of the A accumulator is in use.

MOTOROLA INSTRUCTION SET DETAILS A - 175