Motorola DSP56000, 24-Bit Digital Signal Processor manual Repeated Illegal Instruction

EXCEPTION PROCESSING STATE (INTERRUPT PROCESSING)

ILLEGAL INSTRUCTION INTERRUPT

RECOGNIZED AS PENDING

INTERRUPT CONTROL CYCLE 1

i

INTERRUPT CONTROL CYCLE 2

i

FETCH

n1

n2

n3

n4

n5

n6

n7

—

—

—

ii1

ii2

n8

DECODE

n1

n2

n3

n4

REP

II

—

—

—

—

ii1

ii2

n8

EXECUTE

n1

n2

n3

n4

REP

REP

NOP

—

—

—

ii1

ii2

n8

INSTRUCTION CYCLE COUNT

1

2

3

4

5

6

7

8

9

10

11 12

13

14

15 16

i= INTERRUPT

ii= INTERRUPT INSTRUCTION WORD II = ILLEGAL INSTRUCTION

n = NORMAL INSTRUCTION WORD

Figure 7-6 Repeated Illegal Instruction

There are two cases in which the stacked address will not point to the illegal instruction:

1.If the illegal instruction is one of the two instructions at an interrupt vector loca- tion and is fetched during a regular interrupt service, the processor will stack the address of the next sequential instruction in the normal instruction flow (the regular return address of the interrupt routine that had the illegal opcode in its vector).

2.If the illegal instruction follows an REP instruction (see Figure 7-6), the proces- sor will effectively execute the illegal instruction as a repeated NOP and the interrupt vector will then be inserted in the pipeline. The next instruction will be fetched but will not be decoded or executed. The processor will stack the address of the next sequential instruction, which is two instructions after the illegal instruction.

In DO loops, if the illegal instruction is in the loop address (LA) location and the instruc- tion preceding it (i.e., at LA-1) is being interrupted, the loop counter (LC) will be decre- mented as if the loop had reached the LA instruction. When the interrupt service ends and the instruction flow returns to the loop, the illegal instruction will be refetched (since it is the next sequential instruction in the flow). The loop state machine will again decre- ment LC because the LA instruction is being executed. At this point, the illegal instruction will trigger the III. The result is that the loop state machine decrements LC twice in one loop due to the presence of the illegal opcode at the LA location.

MOTOROLA PROCESSING STATES 7 - 21