INSTRUCTION DESCRIPTIONS

BCHG

Bit Test and Change

BCHG

Explanation of Example: Prior to execution, the 24-bit X location X:$FFE2 (I/O port B data direction register) contains the value $000000. The execution of the BCHG

#$7,X:<<$FFE2 instruction tests the state of the 7th bit in X:$FFE2, sets the carry bit C

accordingly, and then complements the 7th bit in X:$FFE2.

Condition Codes:

15

14

 

13

12

11

10

9

8

7

6

 

5

4

3

2

1

0

LF

DM

T

**

 

S1

S0

 

I1

I0

S

L

E

U

N

Z

 

V

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MR

 

 

 

 

 

 

 

 

 

 

CCR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CCR Condition Codes:

For destination operand SR:

C — Changed if bit 0 is specified. Not affected otherwise.

V — Changed if bit 1 is specified. Not affected otherwise.

Z — Changed if bit 2 is specified. Not affected otherwise.

N — Changed if bit 3 is specified. Not affected otherwise.

U — Changed if bit 4 is specified. Not affected otherwise.

E — Changed if bit 5 is specified. Not affected otherwise.

L — Changed if bit 6 is specified. Not affected otherwise.

S — Changed if bit 7 is specified. Not affected otherwise.

For destination operand A or B:

S —Computed according to the definition. See Notes on page A-47.L — Set if data limiting has occurred. See Notes on page A-47.

E — Not affected

U — Not affected

N — Not affected

Z — Not affected

V — Not affected

C — Set if bit tested is set. Cleared otherwise.

MOTOROLA

INSTRUCTION SET DETAILS

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Image 310
Motorola DSP56000 manual CCR Condition Codes, Not affected Set if bit tested is set. Cleared otherwise