Motorola 24-Bit Digital Signal Processor, DSP56000 manual Wait for Interrupt

INSTRUCTION DESCRIPTIONS

	WAIT	Wait for Interrupt		WAIT
Operation:			Assembler Syntax:
	Disable clocks to the processor core and		WAIT
	enter the WAIT processing state.

Description: Enter the WAIT processing state. The internal clocks to the processor core and memories are gated off, and all activity in the processor is suspended until an unmasked interrupt occurs. The clock oscillator and the internal I/O peripheral clocks remain active. If WAIT is executed when an interrupt is pending, the interrupt will be pro- cessed; the effect will be the same as if the processor never entered the WAIT state and three NOPs followed the WAIT instruction. When an unmasked interrupt or external (hardware) processor RESET occurs, the processor leaves the WAIT state and begins exception processing of the unmasked interrupt or RESET condition. The BR/BG circuits remain active during the WAIT state. The WAIT state is a low-power standby state. The processor always leaves the WAIT state in the T2 clock phase (see the DSP56001 Advance Information Data Sheet (ADI1290)). Therefore, multiple processors may be synchronized by having them all enter the WAIT state and then interrupting them with a common interrupt.

Restrictions: A WAIT instruction cannot be used in a fast interrupt routine.

A WAIT instruction cannot be the last instruction in a DO loop (at LA).

A WAIT instruction cannot be repeated using the REP instruction.

Example:

	:
WAIT	;enter low power mode, wait for interrupt
	:

Explanation of Example: The WAIT instruction suspends normal instruction execution and waits for an unmasked interrupt or external RESET to occur.

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