Motorola 24-Bit Digital Signal Processor, DSP56000 manual For other destination operands

INSTRUCTION DESCRIPTIONS

BCLR

Bit Test and Clear

BCLR

For other destination operands:

C — Set if bit tested is set. Cleared otherwise.

V — Not affected

Z — Not affected

N — Not affected

U — Not affected

E — Not affected

L — Not affected

S — Not affected

MR Status Bits:

For destination operand SR:

I0 — Cleared if bit 8 is specified. Not affected otherwise. I1 — Cleared if bit 9 is specified. Not affected otherwise. S0 — Cleared if bit 10 is specified. Not affected otherwise. S1 — Cleared if bit 11 is specified. Not affected otherwise.

T— Cleared if bit 13 is specified. Not affected otherwise. DM — Cleared if bit 14 is specified. Not affected otherwise LF — Cleared if bit 15 is specified. Not affected otherwise.

For other destination operands:

I0 — Not affected

I1 — Not affected

S0 — Not affected

S1 — Not affected

T— Not affected DM — Not affected LF — Not affected

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