ADDRESSING
4 - 8 ADDRESS GENERATION UNIT
MOTOROLA
Offset registers are not affected by a processor reset.
4.3.3 Modifier Register Files (M0
-
M3 and M4 - M7)
The eight 16-bit modifier registers, M0 - M7, define the type of address arithmetic to be
performed for addressing mode calculations, or they can be used for general-purpose
storage. The address ALU supports linear, modulo, and reverse-carry arithmetic types for
all address register indirect addressing modes. For modulo arithmetic, the contents of Mn
also specify the modulus. Each address register, Rn, has its own modifier register, Mn,
associated with it. Each modifier register is set to $FFFF on processor reset, which spec-
ifies linear arithmetic as the default type for address register update calculations.
4.4 ADDRESSING
The DSP56K provides three different addressing modes: register direct, address register
indirect, and special. Since the register direct and special addressing modes do not nec-
essarily use the AGU registers, they are described in SECTION 6 - INSTRUCTION SET
INTRODUCTION. The address register indirect addressing modes use the registers in
Address Register Indirect Uses Mn
Modifier
Operand Reference Assembler
Syntax
SCDAPXYLXY
No Update No XXXX X (Rn)
Postincrement by 1 Yes XXXX X (Rn)+
Postdecrement by 1 Yes XXXX X (Rn)–
Postincrement by Offset Nn Yes XXXX X (Rn)+Nn
NOTE:S = System Stack Reference
C = Program Control Unit Register Reference
D = Data ALU Register Reference
A = Address ALU Register Reference
P = Program Memory Reference
X = X Memory Reference
Y = Y Memory Reference
L = L Memory Reference
XY = XY Memory Reference
Table 4-1 Address Register Indirect Summary