INSTRUCTION DESCRIPTIONS
A - 122 INSTRUCTION SET DETAILS
MOTOROLA
Operation: Assembler Syntax
If S[n]=0, JSCLR #n,X:ea,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
f S[n]=0, JSCLR #n,X:aa,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
If S[n]=0, JSCLR #n,X:pp,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
If S[n]=0, JSCLR #n,Y:ea,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
If S[n]=0, JSCLR #n,Y:aa,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
If S[n]=0, JSCLR #n,Y:pp,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
If S[n]=0, JSCLR #n,S,xxxx
then SP+1
➞
SP; PC
➞
SSH; SR
➞
SSL; xxxx
➞
PC
else PC+1
➞
PC
Description:
Jump to the subroutine at the 16-bit absolute address in program memory
specified in the instruction’s 24-bit extension word if the n
th
bit of the source operand S is
clear. The bit to be tested is selected by an immediate bit number from 0–23. If the n
th
bit
of the source operand S is clear, the address of the instruction immediately following the
JSCLR instruction (PC) and the system status register (SR) are pushed onto the system
stack. Program execution then continues at the specified absolute address in the instruc-
tion’s 24-bit extension word. If the specified memory bit is not clear, the program counter
(PC) is incremented and the extension word is ignored. However, the address register
JSCLR Jump to Subroutine if Bit Clear JSCLR