INSTRUCTION DESCRIPTIONS
A - 242 INSTRUCTION SET DETAILS MOTOROLA
Operation: Assembler Syntax:
D[47:24] ➞ D[47:24] (parallel move) NOT D (parallel move)
where “—” denotes the logical NOT operator
Description: Take the ones complement of bits 47–24 of the destination operand D and
store the result back in bits 47–24 of the destination accumulator. This is a 24-bit opera-
tion. The remaining bits of D are not affected.
Example:
NOT A1 AB,L:(R2)+ ;save A1,B1, take the ones complement of A1
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $00:123456:789ABC. The NOT A instruction takes the ones complement of bits
47–24 of the A accumulator (A1) and stores the result back in the A1 register. The
remaining bits of the A accumulator are not affected.
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
N — Set if bit 47 of A or B result is set
Z — Set if bits 47-24 of A or B result are zero
V — Always cleared
NOT Logical Complement NOT
Before Execution After Execution
A$00:123456:789ABC $00:EDCBA9:789AB
A
MR CCR
1514131211109876543210
LF DM T ** S1 S0 I1 I0 SLEU NZ VC