Motorola 24-Bit Digital Signal Processor, DSP56000 manual 16 Bit

INSTRUCTION FORMATS

address modifier registers, M0–M7.

23 8 7 0

BUS

MR, CCR, OMR, AND SP	NOT USED
AS A DESTINATION

MR, CCR, OMR, AND SP

AS A SOURCE

LSB

A2

MR, CCR, OMR, AND SP

23	8 7	0
ZERO FILL			BUS

(a) 16 Bit

23 0

BUS

LC, LA, SR, SSH, AND SSL

AS A DESTINATION NOT USED

LC, LA, SR, SSH, AND SSL

AS A SOURCE

LSB OF

WORD

150

LC, LA, SR, SSH, AND SSL

23	16 15	0
ZERO FILL			BUS

(b) 8 Bit

Figure 6-6 Reading and Writing Control Registers

6.3.2.3Program Control Registers

The 8-bit operating mode register (OMR) may be accessed as a word operand. However, not all eight bits are defined, and those that are defined will vary depending on the DSP56K family member. In general, undefined bits are written as “don’t care” and read as zero.

The 16-bit SR has the system mode register (MR) occupying the high-order eight bits and

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