Motorola 24-Bit Digital Signal Processor, DSP56000 - page 105

INSTRUCTION FORMATS
6 - 8 INSTRUCTION SET INTRODUCTION MOTOROLA
address modifier registers, M0–M7.
6.3.2.3 Program Control Registers
The 8-bit operating mode register (OMR) may be accessed as a word operand. However,
not all eight bits are defined, and those that are defined will vary depending on the
DSP56K family member. In general, undefined bits are written as “don’t care” and read as
zero.
The 16-bit SR has the system mode register (MR) occupying the high-order eight bits and
(b) 8 Bit
(a) 16 Bit
Figure 6-6 Reading and Writing Control Registers
23 8 7 0
23 8 7 0
BUS
NOT USED LSB
A2
BUS
MR, CCR, OMR, AND SP
AS A DESTINATION
AS A SOURCE
MR, CCR, OMR, AND SP MR, CCR, OMR, AND SP
ZERO FILL
23 16 15 0
23 0 BUS
NOT USED LSB OF
WORD
BUS
LC, LA, SR, SSH, AND SSL
AS A DESTINATION
AS A SOURCE
LC, LA, SR, SSH, AND SSL 15 0
ZERO FILL
LC, LA, SR, SSH, AND SSL